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EVALUATION KIT AVAILABLE
1
TC7662B
CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER
FEATURES
s s s s s Wide Operating Voltage Range: 1.5V to 15V Boost Pin (Pin 1) for Higher Switching Frequency High Power Efficiency is 96% Easy to Use - Requires Only 2 External Non-Critical Passive Components Improved Direct Replacement for Industry Standard ICL7660 and Other Second Source Devices
GENERAL DESCRIPTION
The TC7662B is a pin-compatible upgrade to the Industry standard TC7660 charge pump voltage converter. It converts a +1.5V to +15V input to a corresponding - 1.5 to - 15V output using only two low-cost capacitors, eliminating inductors and their associated cost, size and EMI. The on-board oscillator operates at a nominal frequency of 10kHz. Frequency is increased to 35kHz when pin 1 is connected to V+, allowing the use of smaller external capacitors. Operation below 10kHz (for lower supply current applications) is also possible by connecting an external capacitor from OSC to ground (with pin 1 open). The TC7662B is available in both 8-pin DIP and 8-pin small outline (SO) packages in commercial and extended temperature ranges.
2 3 4 5 6
APPLICATIONS
s s s s s Simple Conversion of +5V to 5V Supplies Voltage Multiplication VOUT = nVIN Negative Supplies for Data Acquisition Systems and Instrumentation RS232 Power Supplies Supply Splitter, VOUT = VS/2
ORDERING INFORMATION
Part No.
TC7662BCOA TC7662BCPA TC7662BEOA TC7662BEPA
PIN CONFIGURATION (DIP and SOIC)
BOOST 1 CAP + 2 8 V+ 7 OSC BOOST 1 CAP + 2 GND 3 CAP - 4 8 V+ 7 OSC TC7662BCOA 6 LOW VOLTAGE (LV) TC7662BEOA 5 VOUT
Package
8-Pin SOIC 8-Pin Plastic DIP 8-Pin SOIC 8-Pin Plastic DIP
Temperature Range
0C to +70C 0C to +70C - 40C to +85C - 40C to +85C
GND 3 TC7662BCPA 6 LOW VOLTAGE (LV) TC7662BEPA 5 VOUT CAP - 4
TC7660EV
Evaluation Kit for Charge Pump Family
FUNCTIONAL BLOCK DIAGRAM
V + CAP + 8 BOOST 1 2
OSC
7
RC OSCILLATOR
/2
VOLTAGE- LEVEL TRANSLATOR
4
CAP -
LV
6 5 INTERNAL VOLTAGE REGULATOR LOGIC NETWORK VOUT
7
TC7662B
3 GND
8
TC7662B-8 9/11/96
TELCOM SEMICONDUCTOR, INC.
4-83
CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC7662B
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage ...................................................... +16.5V LV, Boost and OSC Inputs Voltage (Note 1) V+<5.5V ..................................... - 0.3V to (V+ + 0.3V) >5.5V .................................. (V+ - 5.5V) to (V+ + 0.3V) Current Into LV (Note 1) V+ >3.5V ............................................................. 20A Output Short Duration (VSUPPLY 5.5V) ....................................... Continuous Power Dissipation (TA 70C) (Note 2) Plastic DIP ......................................................730mW SO ..................................................................470mW Operating Temperature Range C Suffix .................................................. 0C to +70C E Suffix ............................................. - 40C to +85C Storage Temperature Range ................ - 65C to +150C Lead Temperature (Soldering, 10 sec) ................. +300C
*Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS: V+ = 5V, TA = +25C, OSC = Free running, Test Circuit Figure 2, Unless
Otherwise Specified. Symbol
I+
Parameter
Supply Current (Note 3) (Boost pin OPEN OR GND)
Test Conditions
RL = , +25C 0C TA +70C - 40C TA +85C - 55C TA +125C 0C TA +70C - 40C TA +85C - 55C TA +125C RL = 10 k, LV Open, TMIN TA TMAX RL = 10 k, LV to GND, TMIN TA TMAX IOUT = 20 mA, 0C TA +70C IOUT = 20 mA, - 40C TA +85C IOUT = 20 mA, - 55C TA +125C IOUT = 3 mA, V+ = 2V, LV to GND , 0C TA +70C IOUT = 3 mA, V+ = 2V, LV to GND , - 40C TA +85C IOUT = 3 mA, V+ = 2V, LV to GND , - 55C TA +125C COSC = 0, Pin 1 Open or GND Pin 1 = V+ RL = 5 k TMIN TA TMAX RL = V+ = 2V V+ = 5V
Min
-- -- -- -- --
Typ
80 -- -- -- --
Max
160 180 180 200 300 350 400 15 3.5 100 120 150 250 300 400 -- -- -- -- --
Unit
A A A A A
I+
Supply Current (Boost pin = V+) Supply Voltage Range, High (Note 4) Supply Voltage Range, Low Output Source Resistance
+ VH + VL
3.0 1.5 -- -- -- -- -- -- 5 96 95 99 -- --
-- -- 65 -- -- -- -- -- 10 35 96 97 99.9 1 100
V V kHz % % M k
ROUT
fOSC PEff VOUTEff ZOSC NOTES:
Oscillator Frequency Power Efficiency Voltage Conversion Efficiency Oscillator Impedance
1. Connecting any terminal to voltages greater than V+ or less than GND may cause destructive latch-up. It is recommended that no inputs from sources operating from external supplies be applied prior to "power up" of the TC7662B. 2. Derate linearly above 50C by 5.5 mW/C. 3. In the test circuit, there is no external capacitor applied to pin 7. However, when the device is plugged into a test socket, there is usually a very small but finite stray capacitance present, of the order of 5pF. 4. The TC7662B can operate without an external diode over the full temperature and voltage range. This device will function in existing designs which incorporate an external diode with no degradation in overall circuit performance. 4-84
TELCOM SEMICONDUCTOR, INC.
CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC7662B
DETAILED DESCRIPTION
The TC7662B contains all the necessary circuitry to complete a negative voltage converter, with the exception of two external capacitors which may be inexpensive 1F polarized electrolytic types. The mode of operation of the device may be best understood by considering Figure 2, which shows an idealized negative voltage converter. Capacitor C1 is charged to a voltage V+ for the half cycle when switches S1 and S3 are closed. (Note: Switches S2 and S4 are open during this half cycle.) During the second half cycle of operation, switches S2 and S4 are closed, with S1 and S3 open, thereby shifting capacitor C1 negatively by V+ volts. Charge is then transferred from C1 to C2 such that the voltage on C2 is exactly V+, assuming ideal switches and no load on C2. The TC7662B approaches this ideal situation more closely than existing non-mechanical circuits. In the TC7662B, the four switches of Figure 2 are MOS power switches; S1 is a P-channel device and S2, S3 and S4 are N-channel devices. The main difficulty with this approach is that in integrating the switches, the substrates of S3 and S4 must always remain reverse biased with respect to their sources, but not so much as to degrade their "ON" resistances. In addition, at circuit start up, and under output short circuit conditions (VOUT = V+), the output voltage must be sensed and the substrate bias adjusted accordingly. Failure to accomplish this would result in high power losses and probable device latchup. The problem is eliminated in the TC7662B by a logic network which senses the output voltage (VOUT) together with the level translators, and switches the substrates of S3 and S4 to the correct level to maintain necessary reverse bias. The voltage regulator portion of the TC7662B is an integral part of the anti-latchup circuitry; however, its inherent voltage drop can degrade operation at low voltages. Therefore, to improve low voltage operation, the "LV" pin should be connected to GND, disabling the regulator. For supply voltages greater than 3.5 volts, the LV terminal must be left open to insure latchup proof operation and prevent device damage.
V+ 1 2 C1 + 10 F 3 TC7662B 4 8 7 6 5 RL VO C2 10 F IL IS V+ (+5V)
1
THEORETICAL POWER EFFICIENCY CONSIDERATIONS
In theory, a voltage converter can approach 100% efficiency if certain conditions are met: A. The drive circuitry consumes minimal power. B. The output switches have extremely low ON resistance and virtually no offset. C. The impedances of the pump and reservoir capacitors are negligible at the pump frequency. The TC7662B approaches these conditions for negative voltage conversion if large values of C1 and C2 are used. Energy is lost only in the transfer of charge between capacitors if a change in voltage occurs. The energy lost is defined by: E = 1/2 C1 (V12 - V22) where V1 and V2 are the voltages on C1 during the pump and transfer cycles. If the impedances of C1 and C2 are relatively high at the pump frequency (refer to Figure 2) compared to the value of RL, there will be a substantial difference in voltages V1 and V2. Therefore, it is desirable not only to make C2 as large as possible to eliminate output voltage ripple, but also to employ a correspondingly large value for C1 in order to achieve maximum efficiency of operation.
2 3 4 5 6 7
Dos and Don'ts
1. Do not exceed maximum supply voltages. 2. Do not connect the LV terminal to GND for supply voltages greater than 3.5 volts. 3. Do not short circuit the output to V+ supply for voltages above 5.5 volts for extended periods; however, transient conditions including start-up are okay.
S1 VIN C1 S2
S3
S4
C2 VOUT = - VIN
NOTE: For large values of COSC (>1000 pF), the values of C1 and C2 should be increased to 100 F.
+
Figure 1. TC7662B Test Circuit
Figure 2. Idealized Negative Voltage Capacitor 4-85
8
TELCOM SEMICONDUCTOR, INC.
CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC7662B
4. When using polarized capacitors in the inverting mode, the + terminal of C1 must be connected to pin 2 of the TC7662B and the - terminal of C2 must be connected to GND. 5. If the voltage supply driving the TC7662B has a large source impedance (25-30 ohms), then a 2.2F capacitor from pin 8 to ground may be required to limit the rate of rise of the input voltage to less than 2V/sec. voltage and temperature (See the Output Source Resistance graphs), typically 23 at +25C and 5V. Careful selection of C1 and C2 will reduce the remaining terms, minimizing the output impedance. High value capacitors will reduce the 1/(fPUMP x C1) component, and low ESR capacitors will lower the ESR term. Increasing the oscillator frequency will reduce the 1/(fPUMP x C1) term, but may have the side effect of a net increase in output impedance when C1 > 10F and there is not enough time to fully charge the capacitors every cycle. In a typical application when fOSC = 10kHz and C = C1 = C2 = 10F: RO 2 x 23 +
1 (5 x 10 x 10 x 10-6)
3
TYPICAL APPLICATIONS Simple Negative Voltage Converter
The majority of applications will undoubtedly utilize the TC7662B for generation of negative supply voltages. Figure 3 shows typical connections to provide a negative supply where a positive supply of +1.5V to +15V is available. Keep in mind that pin 6 (LV) is tied to the supply negative (GND) for supply voltages below 3.5 volts.
V+ 1 10 F + - 2 3 4 TC7662B 8 7 6 5 - 10 F + VOUT = -V+ RO - V+ + VOUT
+ 4 x ESRC1 + ESRC2
RO (46 + 20 + 5 x ESRC) Since the ESRs of the capacitors are reflected in the output impedance multiplied by a factor of 5, a high value could potentially swamp out a low 1/(fPUMP x C1) term, rendering an increase in switching frequency or filter capacitance ineffective. Typical electrolytic capacitors may have ESRs as high as 10.
Output Ripple
ESR also affects the ripple voltage seen at the output. The total ripple is determined by 2 voltages, A and B, as shown in Figure 4. Segment A is the voltage drop across the ESR of C2 at the instant it goes from being charged by C1 (current flowing into C2) to being discharged through the load (current flowing out of C2). The magnitude of this current change is 2 x IOUT, hence the total drop is 2 x IOUT x ESRC2 volts. Segment B is the voltage change across C2 during time t2, the half of the cycle when C2 supplies current to the load. The drop at B is IOUT x t2/C2 volts. The peak-topeak ripple voltage is the sum of these voltage drops: VRIPPLE
a.
b.
Figure 3. Simple Negative Converter and its Output Equivalent
The output characteristics of the circuit in Figure 3 can be approximated by an ideal voltage source in series with a resistance as shown in Figure 3b. The voltage source has a value of-(V+). The output impedance (RO) is a function of the ON resistance of the internal MOS switches (shown in Figure 2), the switching frequency, the value of C1 and C2, and the ESR (equivalent series resistance) of C1 and C2. A good first order approximation for RO is: RO 2(RSW1 + RSW3 + ESRC1) + 2(RSW2 + RSW4 + ESRC1) +
fOSC 2 1 fPUMP x C1
(
1 2 x fPUMP x C2
+ ESRC2 x IOUT
)
t2
t1
+ ESRC2
0 B
(fPUMP =
, RSWX = MOSFET switch resistance)
V
Combining the four RSWX terms as RSW, we see that:
A
RO 2 x RSW +
1 fPUMP x C1
+ 4 x ESRC1 + ESRC2
- (V+)
RSW, the total switch resistance, is a function of supply
4-86
Figure 4. Output Ripple
TELCOM SEMICONDUCTOR, INC.
CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC7662B
Paralleling Devices
Any number of TC7662B voltage converters may be paralleled to reduce output resistance (Figure 5). The reservoir capacitor, C2, serves all devices, while each device requires its own pump capacitor, C1. The resultant output resistance would be approximately: ROUT = ROUT (of TC7662B) n (number of devices)
1
Changing the TC7662B Oscillator Frequency
It may be desirable in some applications (due to noise or other considerations) to increase the oscillator frequency. This is achieved by one of several methods described below: By connecting the BOOST Pin (Pin 1) to V+, the oscillator charge and discharge current is increased and, hence the oscillator frequency is increased by approximately 3-1/ 2 times. The result is a decrease in the output impedance and ripple. This is of major importance for surface mount applications where capacitor size and cost are critical. Smaller capacitors, e.g., 0.1F, can be used in conjunction with the Boost Pin in order to achieve similar output currents compared to the device free running with C1 = C2 = 1F or 10F. (Refer to graph of Output Source Resistance as a Function of Oscillator Frequency). Increasing the oscillator frequency can also be achieved by overdriving the oscillator from an external clock as shown in Figure 7. In order to prevent device latchup, a 1k resistor must be used in series with the clock output. In a situation where the designer has generated the external clock frequency using TTL logic, the addition of a 10k pull-upresistor to V+ supply is required. Note that the pump frequency with external clocking, as with internal clocking, will be 1/2 of the clock frequency. Output transitions occur on the positive-going edge of the clock.
V+ 1 2 + 10F 3 4 8 1 k 7 CMOS GATE V+
2 3 4 5 6 7
V 1 2 C1 3 4 8 7
+
1 2 C1 3 4
8 7 RL
TC7662B
"1"
6 5
TC7662B
"n"
6 5
+
C2
Figure 5. Paralleling Devices
Cascading Devices
The TC7662B may be cascaded as shown to produce larger negative multiplication of the initial supply voltage. However, due to the finite efficiency of each device, the practical limit is 10 devices for light loads. The output voltage is defined by: VOUT = -n(VIN) where n is an integer representing the number of devices cascaded. The resulting output resistance would be approximately the weighted sum of the individual TC7662B ROUT values.
TC7662B
6 5 + 10F VOUT
Figure 7. External Clocking
V+ 1 2 10F + 3 4 TC7662B "1" 8 7 6 5 10F + 1 2 3 4 TC7662B "n" 8 7 6 5 + *VOUT = -nV+ 10F VOUT 10F
Figure 6. Cascading Devices for Increased Output Voltage
It is also possible to increase the conversion efficiency of the TC7662B at low load levels by lowering the oscillator frequency. This reduces the switching losses, and is shown in Figure 8. However, lowering the oscillator frequency will cause an undesirable increase in the impedance of the pump (C1) and reservoir (C2) capacitors; this is overcome by increasing the values of C1 and C2 by the same factor that the frequency has been reduced. For example, the addition of a 100pF capacitor between pin 7 (Osc) and V+ will lower the oscillator frequency to 1kHz from its nominal frequency of 10kHz (multiple of 10), and thereby necessitate a corresponding increase in the value of C1 and C2 (from 10F to 100F).
4-87
8
TELCOM SEMICONDUCTOR, INC.
CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC7662B
V+ 1 2 C1 + 3 4 8 7 COSC
1 2 8 7 + V+ VOUT = - (V+- VF) C3
TC7662B
6
3
TC7662B
6 5
D1
5 + C2
VOUT
+ C1
4 + C2
D2
VOUT = (2 V +) - (2 VF) + C4
Figure 8. Lowering Oscillator Frequency
Positive Voltage Doubling
The TC7662B may be employed to achieve positive voltage doubling using the circuit shown in Figure 9. In this application, the pump inverter switches of the TC7662B are used to charge C1 to a voltage level of V+ - VF (where V+ is the supply voltage and VF is the forward voltage on C1 plus the supply voltage (V+) applied through diode D2 to capacitor C2). The voltage thus created on C2 becomes (2 V+) - (2 VF), or twice the supply voltage minus the combined forward voltage drops of diodes D1 and D2. The source impedance of the output (VOUT) will depend on the output current, but for V+ = 5V and an output current of 10 mA, it will be approximately 60.
V+ 1 2 3 4 8 7 D1 D2 + C1 + C2 VOUT = (2 V+) - (2 VF)
+ RL1 VOUT = V + -V - 2 RL2 50 F 1 2 50 F + 3 4 8 7 V+
Figure 10. Combined Negative Converter and Positive Doubler
Voltage Splitting
The bidirectional characteristics can also be used to split a higher supply in half, as shown in Figure 11. The combined load will be evenly shared between the two sides and a high value resistor to the LV pin ensures start-up. Because the switches share the load in parallel, the output impedance is much lower than in the standard circuits, and higher currents can be drawn from the device. By using this circuit, and then the circuit of Figure 6, +15V can be converted (via +7.5V and -7.5V) to a nominal -15V, though with rather high series resistance (~250).
TC7662B
6 5
TC7662B
6 5
Figure 9. Positive Voltage Multiplier
50 F
+ V-
Combined Negative Voltage Conversion and Positive Supply Multiplication
Figure 10 combines the functions shown in Figures 3 and 9 to provide negative voltage conversion and positive voltage doubling simultaneously. This approach would be, for example, suitable for generating +9V and -5V from an existing +5V supply. In this instance, capacitors C1 and C3 perform the pump and reservoir functions, respectively, for the generation of the negative voltage, while capacitors C2 and C4 are pump and reservoir, respectively, for the doubled positive voltage. There is a penalty in this configuration which combines both functions, however, in that the source impedances of the generated supplies will be somewhat higher due to the finite impedance of the common charge pump driver at pin 2 of the device.
4-88 Figure 11. Splitting a Supply in Half
TELCOM SEMICONDUCTOR, INC.
CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC7662B
Regulated Negative Voltage Supply
In some cases, the output impedance of the TC7662B can be a problem, particularly if the load current varies substantially. The circuit of Figure 12 can be used to overcome this by controlling the input voltage, via an ICL7611 low-power CMOS op amp, in such a way as to maintain a nearly constant output voltage. Direct feedback is advisable, since the TC7662B's output does not respond instantaneously to change in input, but only after the switching delay. The circuit shown supplies enough delay to accommodate the TC7662B, while maintaining adequate feedback. An increase in pump and storage capacitors is desirable, and the values shown provide an output impedance of less than 5 to a load of 10mA.
+5 LOGIC SUPPLY
1
2
11 1 3 RS232 DATA OUTPUT
12 TTL DATA INPUT 16 4 15 IH5142 13
1 2 + 1F - 3 4
8 7
TC7662B
6 5
14
3 4 5 6 7
+5V 1F + -5V
+8V 56k 50k
50k - +8V - + 1 2 + 100F 3 4 8 7 + 10F V+
Figure 13. RS232 Levels from a Single 5V Supply
100k
TC7662B
6 5 VOUT
800k
250K VOLTAGE ADJUST
100F
Figure 12. Regulating the Output Voltage
8
TELCOM SEMICONDUCTOR, INC.
4-89
CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC7662B
TYPICAL CHARACTERISTICS
Supply Current vs. Temperature (with Boost Pin = VIN) Voltage Conversion
101.0 100.5 100.0 99.5 99.0 98.5 TA = 25C 98.0 1 2 3 4 5 6 7 8 9 10 11 12
INPUT VOLTAGE VIN (V)
1000 800 600
IDD (A)
VOLTAGE CONVERSION EFFICIENCY (%)
Without Load
VIN = 12V
400 200 0 -40
10K Load
VIN = 5V -20 0 20 40 60 80 100
TEMPERATURE (C)
Output Source Resistance vs. Supply Voltage
100
OUTPUT SOURCE RESISTANCE ()
Output Source Resistance vs. Temperature
100
OUTPUT SOURCE RESISTANCE ()
70 50 30
80 60 40 20 0 -40
VIN = 2.5V
VIN = 5.5V
IOUT = 20mA TA = 25C 10 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12
SUPPLY VOLTAGE (V)
-20
0
20
40
60
80
100
TEMPERATURE (C)
Output Voltage vs. Output Current
0
OUTPUT VOLTAGE VOUT (V) SUPPLY CURRENT IDD (A)
200 175 150 125 100 75 50 25 0 -40
Supply Current vs. Temperature
-2 -4 -6 -8 -10 -12 0 10 20 30 40 50 60 70 80 90 100
VIN = 12.5V
VIN = 5.5V -20 0 20 40 60 80 100
OUTPUT CURRENT (mA)
TEMPERATURE (C)
4-90
TELCOM SEMICONDUCTOR, INC.
CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER TC7662B
TYPICAL CHARACTERISTICS (Cont.)
Unloaded Osc Freq vs. Temperature
12
OSCILLATOR FREQUENCY (kHz) OSCILLATOR FREQUENCY (kHz)
1
60 50 40
Unloaded Osc Freq vs. Temperature with Boost Pin = VIN
2 3
10 8 6 4 VIN = 12V 2 0 -40 -20 0 20 40 60 80 100 VIN = 5V
VIN = 5V 30 VIN = 12V 20 10 0 -40 -20 0 20 40 60 80 100
TEMPERATURE (C)
TEMPERATURE (C)
4 5 6 7
8
TELCOM SEMICONDUCTOR, INC.
4-91

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